I received a joint PhD degree in Computer Architecture and Computer Science from UPC/Barcelona Tech and Ghent University in 2015. I hold an Informatics Engineering degree and a Masters degree in Computer Architecture from UPC/Barcelona Tech. Between 2009 and 2011, I was affiliated to the Programming Models group of Barcelona Supercomputing Center. I interned for 3 months at the Compilers research group at ARM Ltd. and for 18 months at the Green Computing Centre of Waseda University in Japan. Prior to joining Bell Labs, I conducted research on low-power multicore simulation as a postdoc researcher in the Electronics and Information Systems department at Ghent University.
Since April 2018, I am part of the New Software Experiences team of the Application Platforms & Software Systems Research Lab.
2015: Joint Ph.D. in Computer Science Engineering and Computer Architecture. Ghent University (Belgium) and Barcelona Tech - UPC (Spain).
2009: MSc in Computer Architecture, Networks and Systems. UPC, Barcelona, Spain.
2007: Informatics Engineering. UPC, Barcelona, Spain.
Selected articles and publications
2019: A. Adileh, C. Gonzalez-Alvarez, J. M. de Haro Ruiz, and L. Eeckhout. "Racing to Hardware-Validated Simulation". IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), March 2019.
2016: C. González-Álvarez, J. B. Sartor, C. Álvarez, D. Jiménez-González, and L. Eeckhout. “MInGLE: An Efficient Framework for Domain Acceleration using Low-Power Specialized Functional Units”. ACM Transactions on Architecture and Code Optimization (TACO). June 2016.
2015: C. González-Álvarez, J. B. Sartor, C. Álvarez, D. Jiménez-González, and L. Eeckhout. “Automatic Design of Domain-Specific Instructions for Low-Power Processors”. Proceedings of the 26th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP).
2014: C. González-Álvarez, J.B. Sartor, C. Álvarez, D. Jiménez-González, and L. Eeckhout. “Accelerating an application domain with specialized functional units”. ACM Transactions on Architecture and Code Optimization (TACO), Vol 10, No 4.
2012: C. González-Álvarez, Y. Kanehagi, K. Takemoto, Y. Kishimoto, K. Muto, H. Mikami, A. Hayashi, K. Kimura, H. Kasahara. “Automatic parallelization with OSCAR API Analyzer: a cross-platform performance evaluation”. IPSJ SIG Notes, Dec 2012. Information Processing Society of Japan (IPSJ).
2012: C. Pons, D. Jiménez-González, C. González-Álvarez, H. Servat, D. Cabrera, X. Aguilar, J. Fernández-Recio. “Cell-Dock: high-performance protein-protein docking”. Bioinformatics, July 2012.
2011: C. González-Álvarez, M. Fernandez, D. Jiménez-González, C. Álvarez and X. Martorell. “Automatic generation of application-specific hardware accelerators on OpenSPARC”. Poster at the 2011 International Symposium on Code Generation and Optimization (CGO 2011).
2008 H. Servat, C. González-Álvarez, X. Aguilar, D. Cabrera, D. Jiménez-González. “Drug design issues on the Cell BE”. 2008 International Conference on High Performance Embedded Architectures and Compilers. Pags: 176-190.