Imran Latif is working in End-to-End Mobile Network Solutions lab in Paris-Saclay, France. He is actively pursuing his research on, coudification and virtualization techniques for 5G communications, machine learning for communications and he is an enthusiast about block-chain and its applicability in Telco domain. He received his Ph.D. with highest distinction in telecommunications from Telecom ParisTech, France. During his PhD he has contributed to various European Research Projects (SAMURAI, 4GInvitro, CNES). and supervised master students. He holds a master degree in Communications Systems from Technical University of Munich Germany.
Before joining Bell Labs Imran worked at Sequans Communications headquarter in Paris as Lead DSP Engineer for NB-IoT development from 2013 to 2016, where he designed and developed many HW/SW blocks for different LTE chipsets in the DSP algorithm design team. He holds multiple patents on OTDOA in LTE and flexible turbo decoder design.
He has inclination towards pragmatic research and activities which can be shown as proof of concepts (PoC). He has acted as PoC Manager for technical team in France and provided 5G orchestration design (SWARM, SDNC, SDL) and integration for various PoCs to US and EU based customers.
Doctor of Philosophy (2010 - 2013), Telecomm ParisTech, EURECOM Campus, Sophia Antipolis, France
Physical Layer Design for next generation wireless cellular networks.
with -> Prof. Raymond Knopp and Asst. Prof. Florian Kaltenberger
Master of Science in Communications Systems (2007 - 2009), Technical University of Munich, Germany,
Thesis Joint Network and Channel Coding for Extended Two-Way Relay Networks.
with -> Prof. Dr.-Ing. Norbert Hanik, Dr.-Ing. Christoph Hausl, Dipl.-Ing. Jie Hou
Bachelor of Science in Computer Engineering (2003 - 2007), University of Engineering and Technology Taxila Pakistan,
Design and Implementation of MIMO-OFDM Transceiver.
with -> Prof. Dr. Muid Ur Rahman Mufti
Nokia Bell Labs, Paris, France
Member of Technical Staff, Virtualization and Verification Lab(Nov 2016 - present)
Sequans Communications, Paris, France,
Lead DSP Engineer for NB-IoT(Jun 2016 - Oct 2016)
- Design of various HW/SW blocks for NB-IoT chipset, including many DL blocks and UL blocks.
- Detailed and weekly plannings for the dev phase.
- Coordinate activities of different team members.
- Provide support to DSP, ASIC and PI teams.
Algorithm Design Engineer [Monarch Chipset LTE-M](Jun 2015 - Jun 2016)
- Design of various HW/SW blocks for MONARCH chipset, including digital downlink Frontend, mixed-Radix FFT design, Narrowband Phase Compensation block, HARQ, Parallel Turbo Decoder design.
- Documentation/specification of the designed blocks.
- ASIC and PI support for the tapeout and IOT tests.
- Platform managment for SW Algorithm team.
DSP Engineer(Sep 2013 - Jun 2015)
- Designing new algorithms/defining new architectures for the PHY layer of Sequans LTE chipsets.
- Implementing and validating the methods in the baseband LTE simulator of the DSP team.
- Preparation and update of the design documents along with the development process.
- Support of the Asic team for the Verilog/VHDL implementation.
- Debug and integration phase of the LTE solution together with the Asic and integration teams.
Eurecom, Sophia Antipolis, France, Research Engineer(Mar 2010 - Sep 2013)
- Development of various PHY layer blocks of OpenAirInterface (OAI).
- Modeling and implementation of improved PHY layer methods for LTE/LTE-A in OAI.
Siemens AG, Munich, Germany, Software Engineer(May 2009 - Dec 2009)
- Design and development of various front-end and back-end software components for a simulation environment of various project.
Infineon Technologies, Munich, Germany, InternMay 2008 - Dec 2008
- Contributions for testing different modules of OFDM-based LTE simulation chain and comparison of results with 3GPP LTE RAN WG4 Group’s results.
- Various automatization scripts based on perl for automatic result analysis from OFDM-based LTE Chain Simulator.